A low-power programmable DLL-based clock generator with wide-range anti-harmonic lock

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A low-power programmable DLL-based clock generator with wide-range anti-harmonic lock

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dc.contributor.author Kim, Y.
dc.contributor.author Pham, P.-H.
dc.contributor.author Heo, W.
dc.contributor.author Koo, J.
dc.date.accessioned 2011-05-09T08:43:58Z
dc.date.available 2011-05-09T08:43:58Z
dc.date.issued 2009
dc.identifier.citation Page : 520-523 vi
dc.identifier.isbn 9.78E+12
dc.identifier.uri http://tainguyenso.vnu.edu.vn/jspui/handle/123456789/7308
dc.description.abstract A delay-locked loop (DLL)-based clock generator for dynamic frequency scaling has been developed in a 0.13um CMOS technology. The proposed clock generator can generate a wide-range of the multiplied clock signals ranging from 125MHz to 2GHz. In addition, thanks to the proposed anti-harmonic lock block, the clock generator can change the frequency dynamically in one cycle time of the reference clock. The proposed DLL-based clock generator occupies 0.019mm2 and consumes 21mW at 2GHz. The ratio of power consumption to frequency of the proposed clock generator is smaller than those of conventional ones. ??2009 IEEE. vi
dc.language.iso en vi
dc.publisher 2009 International SoC Design Conference, ISOCC 2009 vi
dc.subject Anti-harmonic lock vi
dc.subject Frequency multiplier vi
dc.title A low-power programmable DLL-based clock generator with wide-range anti-harmonic lock vi
dc.type Article vi

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